/**
  **************************************************************************
  * @file     main.c
  * @brief    main program
  **************************************************************************
  *                       Copyright notice & Disclaimer
  *
  * The software Board Support Package (BSP) that is made available to
  * download from Artery official website is the copyrighted work of Artery.
  * Artery authorizes customers to use, copy, and distribute the BSP
  * software and its related documentation for the purpose of design and
  * development in conjunction with Artery microcontrollers. Use of the
  * software is governed by this copyright notice and the following disclaimer.
  *
  * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
  * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
  * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
  * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
  * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
  *
  **************************************************************************
  */


#include "at32f421_clock.h"
#include "system_task.h"
#include "flapp_system.h"
#include "flapp_flash.h"
#include "fldrv_uart.h"
#include "flapp_factory.h"
#include "flapp_net_slm.h"
#include "flapp_clock.h"
#include "flapp_peripheral.h"
#include "flapp_display.h"
#include "flapp_bat_manage.h"

/** @addtogroup systick_clock_config FLASH_write_read
  * @{
  */
static uint32_t systick_clock_config(uint32_t ticks)
{
	systick_clock_source_config(SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV);
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
  {
    return (1UL);
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL);
  SysTick->VAL   = 0UL;
  SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk |
                   SysTick_CTRL_ENABLE_Msk;
  return (0UL);
}
/**
  * @brief  main function.
  * @param  none
  * @retval none
  */
int main(void)
{
  system_clock_config();
	/* enable pwc and bpr clock */
  crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);

  /* congfig the voltage regulator mode.only used with deep sleep mode */
  pwc_voltage_regulate_set(PWC_REGULATOR_EXTRA_LOW_POWER);
	nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
  systick_clock_config(system_core_clock / 1000U);
	
	flapp_peripheral_init();
	fldrv_uart_init();
	log_build("Sys clock:%u Version:%s\r\n",system_core_clock,VERSION);
	
	fldrv_bat_manage_init();
  flapp_clock_init();
//	flapp_power_on_net_init();		//发送模组复位操作

  while(1)
  {
		Sys_Task_Timer_Scan();
		Sys_Task_Process();
  }
}

void flapp_task_4ms(void)
{
	flapp_factory_rcv_run();
  flapp_net_rcv_slm_run();
}

void flapp_task_100ms(void)
{
	flapp_display_run();
	flapp_bat_manage_run();
}

void flapp_task_50ms(void)
{
	flapp_net_send_slm_run();
	flapp_peripheral_fun();
}

void flapp_task_500ms(void)
{
	flapp_peripheral_tmr_run();
	flapp_clock_run();
}
/**
  * @}
  */

/**
  * @}
  */
